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Items where Author is "Biswas, S.N."

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Number of items: 10.

Journal Article

Assaf, Mansour and Mootoo, R. and Das, S.R. and Petriu, E.M. and Groza, V.Z. and Biswas, S.N. (2014) Designing home security and monitoring system based on field programmable gate array. IETE Technical Review, 31 (2). pp. 168-176. ISSN 0256-4602

Assaf, Mansour and Moore, L-A. and Das, S.R. and Biswas, S.N. and Morton, S. (2014) Low - level logic fault testing ASIC simulation environment. World Journal of Engineering, 2 (3). pp. 279-286. ISSN 1708-5284

Lyons, J. and Biswas, S.N. and Sharma, Alokanand and Dehzangi, A. and Paliwal, K.K. (2014) Protein fold recognition by alignment of amino acid residues using kernelized dynamic time warping. Journal of Theoretical Biology, 354 . pp. 137-145. ISSN 0022-5193

Syed, T. and Das, S.R. and Biswas, S.N. and Assaf, Mansour and Petriu, E. (2013) On automated test system for asymmetric digital subscriber line equipment. World Journal of Engineering, 10 (4). pp. 387-394. ISSN 1708-5284

Assaf, Mansour and Khan, S. and Das, S.R. and Biswas, S.N. (2013) Energy efficient optimization of wireless embedded sensor networks. World Journal of Engineering, 10 (3). pp. 273-282. ISSN 1708-5284

Das, S.R. and Jun-Feng, L. and Nayak, A. and Assaf, Mansour and Petriu, E.M. and Biswas, S.N. (2013) Circuit architecture test verification based on hardware software co-design with ModelSim. IETE Journal of Research, 59 (2). pp. 132-140. ISSN 0377-2063

Das, S.R. and Biswas, S.N. and Petriu, E.M. and Groza, V.Z. and Assaf, Mansour and Nayak, A.R. (2013) Fault - tolerance in VLSI systems design using data compression under constraints of failure probabilities–overview and current status. World Journal of Engineering, 10 (1). pp. 73-84. ISSN 1708-5284

Das, S.R. and Jin, L. and Assaf, Mansour and Biswas, S.N. and Petriu, E.M. (2012) Implementing built-in self-test environment for cores-based digital circuits with Verilog HDL. World Journal of Engineering, 9 (6). pp. 519-528. ISSN 1708-5284

Das, S.R. and Biswas, S.N. and Groza, V.Z. and Assaf, Mansour (2012) Aliasing-free space compaction in VLSI with cascade of two-input OR/NOR logic. International Journal of Research and Reviews in Computer Science, 3 (1). pp. 1361-1366. ISSN 2079-2557

Das, S.R. and Biswas, S.N. and Biswas, D. and Petriu, E.M. and Assaf, Mansour (2012) System-on-chips design using ISCAS benchmark circuits - an approach to fault injection and simulation based on Verilog HDL. IETE Journal of Research, 58 (2). pp. 107-113. ISSN 0377-2063

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